Body: Recently, Suzhou IPSoar Microelectronics Co., Ltd., a leading domestic one-stop Foundation IP supplier, announced that its 40nm Logic Process Memory Compiler IP, specifically designed for Internet of Things (IoT) chips, has been officially launched on the platforms of domestic mainstream Foundries and successfully achieved mass production. Compared to the Memory Compiler offered by current international mainstream IP suppliers, IPSoar's product reduces area by 5%~20% and lowers power consumption by 20~50%, providing IoT chip design companies with a core Foundation IP choice that is both lower in cost and power consumption.

01. R&D Background – Addressing the Mismatch Between 40nm Logic Process Chip Use Cases and Memory Compiler

The global 40nm process node has been in use for 16 years, and its application focus has shifted comprehensively from high-performance computing and graphics processor chips to IoT chips, which are extremely sensitive to cost, area, and power consumption. However, the current mainstream international brands' memory compilers are still early IPs developed to adapt to high-performance chips. When facing the low-cost and low-power requirements of current 40nm mainstream IoT chip application scenarios, they have not achieved optimal adaptation, becoming a bottleneck that restricts chip competitiveness.

02. IPSoar Memory Compiler – Born for IoT Chips, Fully Leveraging the Characteristics of 40nm Process

IPSoar keenly perceived this critical transformation, conducted in-depth research and innovation with customers, and created a 40nm Memory Compiler truly oriented towards IoT needs. The product has completed process adaptation, tape-out verification, and mass production introduction on domestic mainstream Foundry platforms. It is currently the advanced domestic Memory Compiler Foundry shelf IP that is dedicated to 40nm IoT chips and has passed mass production inspection.

03. Core Advantages – Dual Breakthroughs in Area and Power Consumption under Reliability Assurance

The core value of IPSoar's 40nm Memory Compiler lies in:

Foundry Shelf Certification, Mature Mass Production: It has been launched on domestic mainstream Foundry platforms and undergone mass production verification. Customer projects can rely on mature and reliable IP to quickly start and implement.

Significantly Reduced Chip Area (Area Reduction: 5% - 20%): Innovative design and extreme optimization bring better area efficiency. Under the same capacity, the area is 5% to 20% smaller than international mainstream 40nm IP, directly reducing chip costs and enhancing the market competitiveness of IoT chips.

Significantly Lowered Operating Power Consumption (Power Saving: 20 to 50%): Deeply optimized for the long battery life requirements of IoT devices, power consumption can be reduced by up to 50%, significantly extending battery life and meeting green energy efficiency requirements.

Domestic Supply Chain Security Assurance: Local Foundry cooperation + local IP support provide a full-chain domestic solution from IP authorization to tape-out manufacturing, avoiding supply chain risks.

IPSoar Statement

Wu Hao, Co-founder and CEO of Suzhou IPSoar Microelectronics, emphasized: "The successful launch of IPSoar's 40nm Logic Process Memory Compiler marks a solid step in the innovation path of domestic Foundation IP, independent of international mature technology routes. It is an active iteration and upgrade to adapt to the drastic transformation of application scenarios of the same process over a decade. This is not only a technologically advanced IP product but also a mature solution that has passed Silicon verification and better matches the current IoT chip requirements. This product will strongly support Chinese chips in improving market competitiveness in the vast IoT market, which is also an important practice of IPSoar's mission of 'empowering customer innovation with high-quality foundational IP'."

About IPSoar:

Suzhou IPSoar Microelectronics Co., Ltd. (founded in 2018, headquartered in Suzhou) is a leading one-stop Foundation IP and Memory IP supplier in China, specializing in providing high-reliability, high-PPA competitive IP solutions. Its product line comprehensively covers core IPs such as Memory Compiler, Standard Cell Library, GPIO, TCAM Compiler, and OTP, supporting process nodes from 0.18μm to 28nm and advanced process platforms.

As an officially certified partner of 12 mainstream domestic Foundries, the company not only ranks among the few manufacturers capable of providing full-chain IP support from mature processes to advanced nodes but has also been honored with outstanding supplier awards from multiple Foundries due to its stable delivery capabilities and high-quality Foundation IP products and services. In 40nm/28nm and advanced nodes, the PPA (Power/Performance/Area) metrics of its IP products are 5%-20% better than the industry average. The company focuses on the reliability of Foundation IP, relying on a comprehensive quality inspection process. It has now passed ISO 9001 quality system certification, ISO 27001 information security certification, and ISO 26262 functional safety management system ASIL D certification, ensuring a 100% tape-out success rate.

IPSoar consistently adheres to the mission of "Empowering Customers with High-Quality Foundation IP." Through continuous technological iteration and customer collaboration, it helps partners achieve full-cycle value enhancement from IP selection and chip design innovation to successful mass production.

Company Email: sales@ipsoar-tech.com

Company Website: www.ipsoar-tech.com